MMC2107 Datasheet, PDF (316/618 Pages) –

Freescale Semiconductor, Inc.
Timer Modules (TIM1 and TIM2)
In gated time accumulation mode (PAMOD = 1):
1 = Low PAI input enables divided-by-64 clock to pulse
accumulator and trailing rising edge on PAI sets PAIF flag.
0 = High PAI input enables divided-by-64 clock to pulse
accumulator and trailing falling edge on PAI sets PAIF flag.
NOTE: The timer prescaler generates the divided-by-64 clock. If the timer is not
active, there is no divided-by-64 clock.
To operate in gated time accumulation mode:
1. Apply logic 0 to RESET pin.
2. Initialize registers for pulse accumulator mode test.
3. Apply appropriate level to PAI pin.
4. Enable timer.
CLK[1:0] — Clock Select Bits
CLK[1:0] select the timer counter input clock as shown in Table 15-6.
Table 15-6. Clock Selection
CLK[1:0]
Timer Counter Clock⁽¹⁾
00
Timer prescaler clock⁽²⁾
01
PACLK
10
PACLK/256
11
PACLK/65536
1. Changing the CLKx bits causes an immediate change in the timer counter clock input.
2. When PAE = 0, the timer prescaler clock is always the timer counter clock.
PAOVI — Pulse Accumulator Overflow Interrupt Enable Bit
PAOVI enables the PAOVF flag to generate interrupt requests.
1 = PAOVF interrupt requests enabled
0 = PAOVF interrupt requests disabled
PAI — Pulse Accumulator Input Interrupt Enable Bit
PAI enables the PAIF flag to generate interrupt requests.
1 = PAIF interrupt requests enabled
0 = PAIF interrupt requests disabled
Technical Data
316
Timer Modules (TIM1 and TIM2)
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MMC2107 – Rev. 2.0
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