MMC2107 Datasheet, PDF (71/618 Pages) –

Freescale Semiconductor, Inc.
System Memory Map
Register Map
Address
Register Name
0x00c6_0008
↓
0x00c6_ffff
Unimplemented
Bit Number
Bit 7
6
5
4
3
2
1
Bit 0
Access results in a bus monitor timeout generating an access termination transfer error.
Watchdog Timer (WDT)
Bit 15
14
13
12
11
10
9
Bit 8
0x00c7_0000
Watchdog Control Read: 0
0
0
0
0
0
0
0
0x00c7_0001
Register (WCR)
See page 275.
Write:
Reset: 0
0
0
0
0
0
0
0
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
WAIT DOZE DBG
EN
Write:
Reset: 0
0
0
0
1
1
1
1
Bit 15
14
13
12
11
10
9
Bit 8
0x00c7_0002
0x00c7_0003
Watchdog Modulus Read:
Register (WMR)
WM15 WM14 WM13 WM12 WM11 WM10 WM9
WM8
See page 277. ^Write:
Reset: 1
1
1
1
1
1
1
1
Bit 7
6
5
4
3
2
1
Bit 0
Read:
WM7
WM6
WM5
WM4
WM3
WM2
WM1
WM0
Write:
Reset: 1
1
1
1
1
1
1
1
Bit 15
14
13
12
11
10
9
Bit 8
0x00c7_0004 Watchdog Count Register Read: WC15 WC14 WC13 WC12 WC11 WC10 WC9
WC8
0x00c7_0005
(WCNTR)
See page 278.
Write:
Reset: 1
1
1
1
1
1
1
1
Bit 7
6
5
4
3
2
1
Bit 0
Read: WC7
WC6
WC5
WC4
WC3
WC2
WC1
WC0
Write:
Reset: 1
1
1
1
1
1
1
1
P = Current pin state
U = Unaffected
= Writes have no effect and the access terminates without a transfer error exception.
Figure 2-2. Register Summary (Sheet 18 of 34)
MMC2107 – Rev. 2.0
MOTOROLA
System Memory Map
For More Information On This Product,
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Technical Data
71