MMC2107 Datasheet, PDF (215/618 Pages) –

Freescale Semiconductor, Inc.
Non-Volatile Memory FLASH (CMFR)
Functional Description
9.8.5.1 Erase Sequence
Use this sequence to enable the high voltage to the array or shadow
information for erase operation:
1. Make sure that CMFRMTR is in its reset state, and write
PAWS[2:0] = 111 to override firmware amplitude modulation.
2. In CMFRMCR, write PROTECT[7:0] to disable protection of the
blocks to be erased.
3. Use the procedure in Table 9-6 to write the pulse-width timing
control fields for an erase pulse with BLOCK[7:0] selecting the
blocks to be erased and ERASE = SES = 1 in CMFRCTL.
4. Execute an erase interlock write to any array location.
5. In CMFRCTL, write EHV = 1.
6. Read CMFRCTL until HVS = 0.
7. In CMFRCTL, write EHV = 0.
8. Verify the erase by reading all locations that are being erased,
including the shadow information if the block that contains it is
erased. Off-page reads are erase margin reads that update the
read page buffer. If all the locations read as erased, continue to
the next step otherwise, update PAWS and NVR (if required, see
Table 9-9). Then go back to step 5.
To reduce the time for verification, upon the first read of a 0, go to
step 5. After a location has been verified (all bits are erased), it is
not necessary to reverify locations after subsequent erase pulses.
9. In CMFRCTL, write SES = 0.
10. Make sure that CMFRMTR is in its reset state.
MMC2107 – Rev. 2.0
MOTOROLA
Non-Volatile Memory FLASH (CMFR)
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Technical Data
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