MMC2107 Datasheet, PDF (302/618 Pages) –

Freescale Semiconductor, Inc.
Timer Modules (TIM1 and TIM2)
15.7.3 Timer Output Compare 3 Mask Register
Address: TIM1 — 0x00ce_0002
TIM2 — 0x00cf_0002
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
OC3M3 OC3M2 OC3M1 OC3M0
Write:
Reset: 0
0
0
0
0
0
0
0
= Writes have no effect and the access terminates without a transfer error exception.
Figure 15-4. Timer Output Compare 3 Mask Register (TIMOC3M)
Read: Anytime
Write: Anytime
OC3M[3:0] — Output Compare 3 Mask Bits
Setting an OC3M bit configures the corresponding TIMPORT pin to
be an output. OC3Mx makes the timer port pin an output regardless
of the data direction bit when the pin is configured for output compare
(IOSx = 1). The OC3Mx bits do not change the state of the TIMDDR
bits.
1 = Corresponding TIMPORT pin configured as output
0 = No effect
Technical Data
302
Timer Modules (TIM1 and TIM2)
For More Information On This Product,
Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA