MMC2107 Datasheet, PDF (149/618 Pages) –

Freescale Semiconductor, Inc.
M•CORE M210 Central Processor Unit (CPU)
Data Format Summary
6.6 Data Format Summary
The operand data formats supported by the integer unit are standard
two’s-complement data formats. The operand size for each instruction is
either explicitly encoded in the instruction (load/store instructions) or
implicitly defined by the instruction operation (index operations, byte
extraction). Typically, instructions operate on all 32 bits of the source
operand(s) and generate a 32-bit result.
Memory is viewed from a big-endian byte ordering perspective. The
most significant byte (byte 0) of word 0 is located at address 0. Bits are
numbered within a word starting with bit 31 as the most significant bit.
31
BYTE 0
BYTE 4
BYTE 8
BYTE C
BYTE 1
BYTE 5
BYTE 9
BYTE D
BYTE 2
BYTE 6
BYTE A
BYTE E
0
BYTE 3
BYTE 7
BYTE B
BYTE F
WORD AT 0X0000 000 0
WORD AT 0X0000 000 4
WORD AT 0X0000 000 8
WORD AT 0X0000 000 C
Figure 6-3. Data Organization in Memory
31
87
0
S S S S S S S S S S S S S S S S S S S S SSSS
S BYTE
SIGNED BYTE
31
87
0
000000000000000000000000
BYTE
UNSIGNED BYTE
31
16 15
SSSSSSSSSSSSSSSS
S
HALF-WORD
0
SIGNED
HALF-WORD
31
16 15
0000000000000000
HALF-WORD
0
UNSIGNED
HALF-WORD
31
BYTE 0
BYTE 1
BYTE 2
0
BYTE 3
WORD
Figure 6-4. Data Organization in Registers
MMC2107 – Rev. 2.0
MOTOROLA
M•CORE M210 Central Processor Unit (CPU)
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Technical Data
149