MMC2107 Datasheet, PDF (254/618 Pages) –

Ports Module
Freescale Semiconductor, Inc.
11.4.2.4 Port Clear Output Data Registers
Writing 0s to a port clear output data register (CLRx) clears the
corresponding bits in PORTx. Writing 1s has no effect. Reading CLRx
returns 0s.
CLRx are read/write registers when not in emulation mode.
Address: 0x00c0_0024 — CLRA
0x00c0_0025 — CLRB
0x00c0_0026 — CLRC
0x00c0_0027 — CLRD
0x00c0_0028 — CLRE
0x00c0_0029 — CLRF
0x00c0_002a — CLRG
0x00c0_002b — CLRH
0x00c0_002c — CLRI
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
0
0
0
0
Write: CLRx7 CLRx6 CLRx5 CLRx4 CLRx3 CLRx2 CLRx1 CLRx0
Reset: 0
0
0
0
0
0
0
0
Figure 11-5. Port Clear Output Data Registers (CLRx)
Technical Data
254
Ports Module
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MMC2107 – Rev. 2.0
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