MMC2107 Datasheet, PDF (375/618 Pages) –

Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
Memory Map and Registers
17.6.3 SCK (Serial Clock)
The SCK pin is the serial clock pin for synchronizing transmissions
between master and slave devices. In master mode, SCK is an output.
In slave mode, SCK is an input.
In a multiple-master system, all SCK pins are tied together.
17.6.4 SS (Slave Select)
In master mode, the SS pin can be:
• A mode-fault input
• A general-purpose input
• A general-purpose output
• A slave-select output
In slave mode, the SS pin is always a slave-select input.
17.7 Memory Map and Registers
Table 17-2 shows the SPI memory map.
NOTE:
Reading reserved addresses (0x00cb_004 and 0x00cb_0009 through
0x00cb_000b) and unimplemented addresses (0x00cb_000c through
0x00cb_000f) returns 0s. Writing to unimplemented addresses has no
effect. Accessing unimplemented addresses does not generate an error
response.
Table 17-2. SPI Memory Map
Address
Bits 7–0
Access⁽¹⁾
0x00cb_0000
SPI control register 1 (SPICR1)
S/U
0x00cb_0001
SPI control register 2 (SPICR2)
S/U
0x00cb_0002
SPI baud rate register (SPIBR)
S/U
0x00cb_0003
SPI status register (SPISR)
S/U
0x00cb_0005
SPI data register (SPIDR)
S/U
0x00cb_0006 SPI pullup and reduced drive register (SPIPURD) S/U
0x00cb_0007
SPI port data register (SPIPORT)
S/U
0x00cb_0008
SPI port data direction register (SPIDDR)
S/U
1. S/U = CPU supervisor or user mode access. User mode accesses to supervisor only
addresses have no effect and result in a cycle termination transfer error.
MMC2107 – Rev. 2.0
MOTOROLA
Serial Peripheral Interface Module (SPI)
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Technical Data
375