MMC2107 Datasheet, PDF (222/618 Pages) –

Clock Module
Freescale Semiconductor, Inc.
10.8.3 PLL Lock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
10.8.3.1 PLL Loss of Lock Conditions . . . . . . . . . . . . . . . . . . . . . 238
10.8.3.2 PLL Loss of Lock Reset . . . . . . . . . . . . . . . . . . . . . . . . . 238
10.8.4 Loss of Clock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
10.8.4.1 Alternate Clock Selection . . . . . . . . . . . . . . . . . . . . . . . . 239
10.8.4.2 Loss-of-Clock Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . .242
10.8.5 Clock Operation During Reset . . . . . . . . . . . . . . . . . . . . . . 243
10.8.6 PLL Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
10.8.6.1 Phase and Frequency Detector (PFD). . . . . . . . . . . . . .245
10.8.6.2 Charge Pump/Loop Filter . . . . . . . . . . . . . . . . . . . . . . . . 245
10.8.6.3 Voltage Control Output (VCO) . . . . . . . . . . . . . . . . . . . . 246
10.8.6.4 Multiplication Factor Divider (MFD) . . . . . . . . . . . . . . . . 246
10.9 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
10.10 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
10.2 Introduction
The clock module contains:
• Crystal oscillator (OSC)
• Phase-locked loop (PLL)
• Reduced frequency divider (RFD)
• Status and control registers
• Control logic
To improve noise immunity, the PLL and OSC have their own power
supply pins, V_DDSYN and V_SSSYN. All other circuits are powered by the
normal internal supply pins, V_DD and V_SS.
10.3 Features
Features of the clock module include:
• 2- to 10-MHz reference crystal
• Support for low-power modes
• Separate clock out signal
Technical Data
222
Clock Module
For More Information On This Product,
Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA