MMC2107 Datasheet, PDF (84/618 Pages) –

Freescale Semiconductor, Inc.
System Memory Map
Address
Register Name
0x00ce_0017
0x00cf_0017
Timer Channel 3 Register
Low (TIMC3L)
See page 314.
Read:
Write:
Reset:
0x00ce_0018
0x00cf_0018
Pulse Accumulator
Control Register
(TIMPACTL)
See page 315.
Read:
Write:
Reset:
0x00ce_0019
0x00cf_0019
Pulse Accumulator Flag
Register (TIMPAFLG)
See page 317.
Read:
Write:
Reset:
0x00ce_001a
0x00cf_001a
Pulse Accumulator
Counter Register High
(TIMPACNTH)
See page 318.
Read:
Write:
Reset:
0x00ce_001b
0x00cf_001b
Pulse Accumulator
Counter Register Low
(TIMPACNTL)
See page 318.
Read:
Write:
Reset:
0x00ce_001c
0x00cf_001c
Reserved
Bit 7
Bit 7
0
Bit 7
0
0
Bit 7
0
0
Bit 15
Bit 15
0
Bit 7
Bit 7
0
Bit 7
Bit Number
6
5
4
3
2
1
Bit 0
6
5
4
3
2
1
Bit 0
0
0
0
0
0
0
0
6
5
4
3
2
1
Bit 0
PAE PAMOD PEDGE CLK1
CLK0 PAOVI
PAI
0
0
0
0
0
0
0
6
5
4
3
2
1
Bit 0
0
0
0
0
0
PAOVF PAIF
0
0
0
0
0
14
13
12
11
10
0
0
9
Bit 8
14
13
12
11
10
9
Bit 8
0
0
0
0
0
0
0
6
5
4
3
2
1
Bit 0
6
5
4
3
2
1
Bit 0
0
0
0
0
0
0
0
6
5
4
3
2
1
Bit 0
Writes have no effect, reads return 0s, and the access terminates
without a transfer error exception.
Bit 7
6
5
4
3
2
1
Bit 0
0x00ce_001d
0x00cf_001d
Timer Port Data Register
(TIMPORT)
See page 319.
Read:
Write:
0
0
0
0
PORTT3 PORTT2 PORTT1 PORTT0
Reset: 0
0
0
0
0
0
0
0
Bit 7
6
5
4
3
2
1
Bit 0
0x00ce_001e
0x00cf_001e
Timer Port Data Direction
Register (TIMDDR)
See page 320.
Read:
Write:
Reset:
0
0
0
0
0
0
0
DDRT3 DDRT2 DDRT1 DDRT0
0
0
0
0
0
P = Current pin state
U = Unaffected
= Writes have no effect and the access terminates without a transfer error exception.
Figure 2-2. Register Summary (Sheet 31 of 34)
Technical Data
84
System Memory Map
For More Information On This Product,
Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA