MMC2107 Datasheet, PDF (413/618 Pages) –

Freescale Semiconductor, Inc.
Queued Analog-to-Digital Converter (QADC)
Register Descriptions
Address: 0x00ca_0006
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
PQA4 PQA3
PQA1 PQA0
Write:
Reset: 0
0
0
P
P
0
P
P
= Writes have no effect and the access terminates without a transfer error exception.
P = Current pin state if DDR is input, otherwise undefined
Analog Channel:
Muxed Address Outputs:
External Trigger Inputs:
AN56 AN55
ETRIG2 ETRIG1
AN53
MA1
AN52
MA0
Figure 18-5. QADC Port QA Data Register (PORTQA)
Address: 0x00ca_0007
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
PQB3 PQB2 PQB1 PQB0
Write:
Reset: 0
0
0
0
P
P
P
P
= Writes have no effect and the access terminates without a transfer error exception.
P = Current pin state if DDR is input, otherwise undefined
Analog Channel:
Muxed Analog Inputs:
AN3
AN2
AN1
AN0
AN2
ANy
ANx
ANw
Figure 18-6. QADC Port QB Data Register (PORTQB)
Read: Anytime
Write: Anytime except stop mode
MMC2107 – Rev. 2.0
MOTOROLA
Queued Analog-to-Digital Converter (QADC)
For More Information On This Product,
Go to: www.freescale.com
Technical Data
413