CP3BT23_14 Datasheet, PDF (96/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
Port Pin
PJ6
PJ7
Table 14-2. Alternate Function Select (continued)
PxALTS = 0
WU124
ASYNC
Reserved
WU119
PxALTS = 1
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14.2 Open-Drain Operation
A port pin can be configured to operate as an inverting open-drain output buffer. To do this, the CPU must
clear the bit in the data output register (PxDOUT) and then use the port direction register (PxDIR) to set
the value of the port pin. With the direction register bit set (direction = out), the value zero is forced on the
pin. With the direction register bit clear (direction = in), the pin is placed in the TRI-STATE mode. If
desired, the internal weak pull-up can be enabled to pull the signal high when the output buffer is in
TRISTATE mode.
96
Input/Output Ports
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