CP3BT23_14 Datasheet, PDF (284/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
www.ti.com
Table 28-5. System Configuration Registers
System
Configuration
Registers
MCFG
DBGCFG
MSTAT
7
Reserved
ISPRST
6
5
4
MEM_IO_ SPEED MISC_IO_ SPEED
Reserved
Reserved
WDRST
Reserved
DPGM BUSY
3
SCLKOE
PGMBUSY
2
MCLKOE
OENV2
1
PLLCLKOE
FREEZE
OENV
0
EXIOE
ON
OENV0
Table 28-6. BIU Registers
BIU
Registers
BCFG
IOCFG
SZCFG0
SZCFG
SZCFG2
15 12
11
Reserved
Reserved
Reserved
Reserved
FRE
FRE
FRE
10
IPRE
IPRE
IPRE
9
IPST
IPST
IPST
IPST
8
Res.
Res.
Res.
Res.
7
6
5
Reserved
BW
Reserved
BW
WBR
RBE
BW
WBR
RBE
BW
WBR
RBE
4
3
HOLD
HOLD
HOLD
HOLD
2
1
0
WAIT
WAIT
WAIT
WAIT
EWR
Table 28-7. TBI Register
TBI Register
7
6
5
TMODE
Reserved
4
TSTEN
3
2
ENMEM
1
0
TMSEL
Table 28-8. Flash Program Memory Interface Registers
Flash Program
Memory
Interface
Registers
FMIBAR
FMIBDR
FM0WER
FM1WER
FM2WER
FM3WER
FMCTRL
FMSTAT
FMPSR
FMSTART
FMTRAN
FMPROG
FMPERASE
FMMERASE0
FMEND
FMMEND
FMRCV
FMAR0
FMAR
FMAR2
15
14
13
WRPROT
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RDPROT
IBD
FM0WE
FM1WE
FM2WE
FM3WE
MER
Reserved
ISPE
CADR15:0
IBA
PER
PE
IENP DIS VRF Res. CWD
ROG
DE RR FM FULL FM
PERR
BUSY
FTDIV
FTSTART
FTTRAN
FTPROG
FTPER
FTMER
FTEND
FTMEND
FTRCV
EMPTY
BOOTAREA
LOW
PRW
EERR
Res.
284 Register Bit Fields
Detailed Device Mapping
Submit Documentation Feedback
Product Folder Links: CP3BT23
Copyright © 2013–2014, Texas Instruments Incorporated