CP3BT23_14 Datasheet, PDF (264/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
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26.1.5 Interrupts
The VTU has a total of 16 interrupt sources, four for each of the four timer subsystems. All interrupt
sources have a pending bit and an enable bit associated with them. All interrupt pending bits are denoted
IxAPD through IxDPD where “x” relates to the specific timer subsystem. There is one system level
interrupt request for each of the four timer subsystems.
Figure 26-6 illustrates the interrupt structure of the versatile timer module.
I1AEN
I1BEN
I1CEN
I1DEN
I1APD
I1BPD
I1CPD
I1DPD
System
Interrupt
Request 1
I4AEN
I4BEN
I4CEN
I4DEN
I4APD
I4BPD
System
Interrupt
Request 4
I4CPD
I4DPD
DS093
Figure 26-6. VTU Interrupt Request Structure
Each of the timer pending bits IxAPD through IxDPD is set by a specific hardware event depending on the
mode of operation, i.e., PWM or Capture mode. Table 26-1 outlines the specific hardware events relative
to the operation mode which cause an interrupt pending bit to be set.
264 Versatile Timer Unit (VTU)
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