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CP3BT23_14 Datasheet, PDF (1/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces
CP3BT23
www.ti.com
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN
Interfaces
Check for Samples: CP3BT23
1 Description
The CP3BT23 connectivity processor combines high performance with the massive integration needed for
embedded Bluetooth applications. A powerful RISC core with on-chip SRAM and Flash memory provides
high computing bandwidth, hardware communications peripherals provide highI/O bandwidth, and an
external bus provides system expandability.
On-chip communications peripherals include: Bluetooth Lower Link Controller, dual CAN controllers,
Microwire/Plus, SPI, ACCESS.bus, quad UART, 12-bit A/D converter, and Advanced Audio Interface
(AAI). Additional on-chip peripherals include Random Number Generator (RNG), DMA controller,
CVSD/PCM conversion module, Timing and Watchdog Unit, Versatile Timer Unit, Multi-Function Timer,
and Multi-Input Wake-Up (MIWU) unit.
Bluetooth hand-held devices can be both smaller and lower in cost for maximum consumer appeal. The
low voltage and advanced power-saving modes achieve new design points in the trade-off between
battery size and operating time for handheld and portable applications.
In addition to providing the features needed for the next generation of embedded Bluetooth products, the
CP3BT23 is backed up by the software resources designers need for rapid time-to-market, including an
operating system, Bluetooth protocol stack implementation, peripheral drivers, reference designs, and an
integrated development environment. Combined with a Bluetooth radio transceiver such as Texas
Instruments’ LMX5252, the CP3BT23 provides a complete Bluetooth system solution.
Texas Instruments offers a complete and industry-proven application development environment for
CP3BT23 applications, including the IAR Embedded Workbench, iSYSTEM winIDEA and iC3000 Active
Emulator, Bluetooth Development Board, Bluetooth Protocol Stack, and Application Software.
1.1 FUNCTIONAL BLOCK DIAGRAM
1
Clock Generator
12 MHz and 32 kHz
Oscillator
PLL and Clock
Generator
Power-on-Reset
CR16C
CPU Core
256K Bytes
Flash
Program
Memory
8K Bytes
Flash
Data
32K Bytes
Static
RAM
Dual
CAN 2.0B
Controller
Bluetooth Lower
Link Controller
RF Interface
1K Byte
Sequencer RAM
Protocol
Core
4.5K Bytes
Data RAM
Serial
Debug
Interface
CPU Core Bus
Bus
Interface
Unit
DMA
Controller
Peripheral
Bus
Controller
Interrupt
Control
Unit
CVSD/PCM
Converter
Power
Manage-
ment
Timing and
Watchdog
Unit
Random
Number
Generator
Peripheral Bus
GPIO
Audio
Interface
Microwiire/
SPI
Quad UART
ACCESS
.bus
Versatile
Timer Unit
Muti-Func-
tion Timer
Multi-Input
Wake-Up
8-Channel
12-bit ADC
DS283
Figure 1-1. Block Diagram
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to
specifications per the terms of the Texas Instruments standard warranty. Production
processing does not necessarily include testing of all parameters.
Copyright © 2013–2014, Texas Instruments Incorporated