CP3BT23_14 Datasheet, PDF (21/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
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SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
Relative Mode
Index Mode
Absolute Mode
In relative mode, the operand is addressed using a relative value (displacement)
encoded in the instruction. This displacement is relative to the current Program
Counter (PC), a general-purpose register, or a register pair.
In branch instructions, the displacement is always relative to the current value of
the PC Register. For example, the following instruction causes an unconditional
branch to an address 10 ahead of the current PC. BR *+10
In another example, the operand resides in memory. Its address is obtained by
adding a displacement encoded in the instruction to the contents of register r5. The
address calculation does not modify the contents of register r5. LOADW 12(R5), R6
The following example calculates the address of a source operand by adding a
displacement of 4 to the contents of a register pair (r5, r4) and loads this operand
into the register pair (r7, r6). r7 receives the high word of the operand, and r6
receives the low word.
LOADD 4(r5, r4), (r7, r6)
In index mode, the operand address is calculated with a base address held in either
R12 or R13. The CFG.SR bit must be clear to use this mode.
For relative mode operands, the memory address is calculated by adding the value
of a register pair and a displacement to the base address. The displacement can be
a 14 or 20-bit unsigned value, which is encoded in the Register/Pair Mode
Immediate Mode In register/pair mode, the operand is held in a general-purpose
register, or in a general-purpose register pair. For example, the following instruction
adds the contents of the low byte of register r1 to the contents of the low byte of r2,
and places the result in the low byte register r2. The high byte of register r2 is not
modified. ADDB R1, R2 In immediate mode, the operand is a constant value which
is encoded in the instruction. For example, the following instruction multiplies the
value of r4 by 4 and places the result in r4. MULW $4, R4 instruction
For absolute mode operands, the memory address is calculated by adding a 20-bit
absolute address encoded in the instruction to the base address.
In the following example, the operand address is the sum of the displacement 4,
the contents of the register pair (r5,r4), and the base address held in register r12.
The word at this address is loaded into register r6.
LOADW [r12]4(r5, r4), r6
In absolute mode, the operand is located in memory, and its address is encoded in
the instruction (normally 20 or 24 bits).
For example, the following instruction loads the byte at address 4000 into the lower
8 bits of register r6.
LOADB 4000, r6
For additional information on the addressing modes, see the CompactRISC CR16C Programmer's
Reference Manual.
5.6 STACKS
A stack is a last-in, first-out data structure for dynamic storage of data and addresses. A stack consists of
a block of memory used to hold the data and a pointer to the top of the stack. As more data is pushed
onto a stack, the stack grows downward in memory. The CR16C supports two types of stacks: the
interrupt stack and program stacks.
5.6.1 Interrupt Stack
The processor uses the interrupt stack to save and restore the program state during the exception
handling. Hardware automatically pushes this data onto the interrupt stack before entering an exception
handler. When the exception handler returns, hardware restores the processor state with data popped
from the interrupt stack. The interrupt stack pointer is held in the ISP register.
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