CP3BT23_14 Datasheet, PDF (213/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
www.ti.com
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
21.3.9 UART Oversample Rate Register (UnOVR)
The UnOVR register is a byte-wide, read/write register that specifies the oversample rate. At reset, the
UnOVR register is cleared. The register format is shown below.
7
4
3
0
Reserved
UOVSR
UOVSR
The Oversampling Rate field specifies the oversampling rate, as given in the
following table.
UOVSR3:0
0000–0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Table 21-3.
Oversampling Rate
16
7
8
9
10
11
12
13
14
15
21.3.10 UART Mode Select Register 2 (UnMDSL2)
The UnMDSL2 register is a byte-wide, read/write register that controls the sample mode used to recover
asynchronous data. At reset, the UnOVR register is cleared. The register format is shown below.
7
Reserved
1
0
USMD
USMD
The USMD bit controls the sample mode for asynchronous transmission.
0 – UART determines the sample position automatically.
1 – The UnSPOS register determines the sample position.
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