CP3BT23_14 Datasheet, PDF (259/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
www.ti.com
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
26.1 VTU FUNCTIONAL DESCRIPTION
The VTU is comprised of four timer subsystems. Each timer subsystem contains an 8-bit clock prescaler,
a 16-bit upcounter, and two 16-bit registers. Each timer subsystem controls two I/O pins which either
function as PWM outputs or capture inputs depending on the mode of operation. There are four system-
level interrupt requests, one for each timer subsystem. Each system-level interrupt request is controlled by
four interrupt pending bits with associated enable/disable bits. All four timer subsystems are fully
independent, and each may operate as a dual 8-bit PWM timer, a 16-bit PWM timer, or as a dual 16-bit
capture timer. Figure 26-1 shows the main elements of the VTU.
15
0
MODE_n
15
0
INTCTL_n
15
0
INTPND_n
15
0
IO1CTL_n
15
0
IO2CTL_n
Timer Subsystem 1
7
C1 PRSC
==
Prescaler
Counter
15
0
COUNT1_n
Compare -Capture
PERCAP1_n
Compare -Capture
DTYCAP1_n
Timer Subsystem 2
7
C2 PRSC
==
Prescaler
Counter
15
0
COUNT2_n
Compare -Capture
PERCAP2_n
Compare -Capture
DTYCAP2_n
Timer Subsystem 3
7
C3 PRSC
==
Prescaler
Counter
15
0
COUNT3_n
Compare -Capture
PERCAP3_n
Compare -Capture
DTYCAP3_n
Timer Subsystem 4
7
C4RSC
==
Prescaler
Counter
15
0
COUNT4_n
Compare - Capture
PERCAP4_n
Compare - Capture
DTYCAP4_n
I/O Control I/O Control
I/O Control I/O Control
I/O Control I/O Control
I/O Control I/O Control
TIOn_1
TIOn_2
TIOn_3
TIOn_4
TIOn_5
TIOn_6
TIOn_7
Figure 26-1. Versatile Timer Unit Block Diagram
TIOn_8
DS353
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Versatile Timer Unit (VTU) 259