CP3BT23_14 Datasheet, PDF (89/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
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SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
13.1.14 Wake-Up 1 Pending Clear Register (WK1PCL)
The WK1PCL register is a word-wide write-only register that lets the CPU clear bits in the WK1PND
register. Writing a 1 to a bit position in the WK1PCL register clears the corresponding bit in the WK1PND
register. Writing a 0 has no effect. Do not modify this register with instructions that access the register as
a read-modify-write operand, such as the bit manipulation instructions.
Reading this register location returns undefined data. Therefore, do not use a read-modify-write sequence
(such as the SBIT instruction) to set individual bits. Do not attempt to read the register, then perform a
logical OR on the register value. Instead, write the mask directly to the register address. The register
format is shown below.
15
0
WKCL
WKCL
Writing 1 to a bit clears it.
0 - Writing 0 has no effect
1 - Writing 1 clears the corresponding bit in the WK1PD register.
13.2 PROGRAMMING PROCEDURES
To set up and use the Multi-Input Wake-Up function, use the following procedure. Performing the steps in
the order shown will prevent false triggering of a wake-up condition. This same procedure should be used
following a reset because the wake-up inputs are left floating, resulting in unknown data on the input pins.
1. Clear the WK0ENA and WK1ENA registers to disable wake-up events from the MIWU channels. Clear
the WK0IENA and WK1IENA registers to disable interrupt requests from the MIWU channels.
2. If the MIWU channel comes from a GPIO pin, select the appropriate alternate function.
3. Write the WK0EDG and WK1EDG registers to select the desired type of edge sensitivity (clear for
rising edge, set for falling edge).
4. Set all bits in the WK0PCL and WK0PCL registers to clear any pending bits in the WK0PND and
WK1PND registers.
5. Set up the WK0ICTL1, WK1ICTL1, WK0ICTL2, and WK1ICTL2 registers to define the interrupt request
signal used for each channel.
6. Set the bits in the WK0ENA and WK1ENA registers corresponding to the wake-up channels to be
activated.
To change the edge sensitivity of a wake-up channel, use the following procedure. Performing the steps in
the order shown will prevent false triggering of a wake-up/interrupt condition.
1. Clear the WK0ENA or WK1ENA bit associated with the input to be reprogrammed.
2. Write the new value to the corresponding bit position in the WK0EDG or WK1EDG register to
reprogram the edge sensitivity of the input.
3. Set the corresponding bit in the WK0PCL or WK1PCL register to clear the pending bit in the WK0PND
or WK1PND register.
4. Set the same WK0ENA or WK1ENA bit to re-enable the wake-up function.
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Multi-Input Wake-Up
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