CP3BT23_14 Datasheet, PDF (106/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
www.ti.com
15.5 Bluetooth Sleep Mode
The Bluetooth controller is capable of putting itself into a sleep mode for a specified number of Slow Clock
cycles. In this mode, the controller clocks are stopped internally. The only circuitry which remains active
are two counters (counter N and counter M) running at the Slow Clock rate. These counters determine the
duration of the sleep mode.
The sequence of events when entering the LLC sleep mode is as follows:
1. The current Bluetooth counter contents are read by the CPU.
2. Software “estimates” the Bluetooth counter value after leaving the sleep mode.
3. The new Bluetooth counter value is written into the Bluetooth counter register.
4. The Bluetooth sequencer RAM is updated with the code required by the Bluetooth sequencer to
enter/exit Sleep mode.
5. The Bluetooth sequencer RAM and the Bluetooth LLC registers are switched from the System Clock
domain to the local 12 MHz Bluetooth clock domain. At this point, the Bluetooth sequencer RAM and
Bluetooth LLC registers cannot be updated by the CPU, because the CPU no longer has access to the
Bluetooth LLC.
6. Hardware Clock Control (HCC) is enabled, and the CP3BT23 enters a power-saving mode (Power
Save or Idle mode). While in Power Save mode, the Slow Clock is used as the System Clock. While in
Idle mode, the System Clock is turned off.
7. The Bluetooth sequencer checks if HCC is enabled. If HCC is enabled, the sequencer asserts HCC to
the PMM. On the next rising edge of the low-frequency clock, the 1MHz clock and the 12 MHz clock
are stopped locally within the Bluetooth LLC. At this point, the Bluetooth sequencer is stopped.
8. The M-counter starts counting. After M + 1 Slow Clock cycles, the HCC signal to the PMM is
deasserted.
9. The PMM restarts the 12 MHz Main Clock (and the PLL, if required). The N-counter starts counting.
After N + 1 Slow Clock cycles, the Bluetooth clocks (1 MHz and 12 MHz) are turned on again. The
Bluetooth sequencer starts operating.
10. The Bluetooth sequencer waits for the completion of the sleep mode. When completed, the Bluetooth
sequencer asserts a wake-up signal to the MIWU (see Section 13).
11. The PMM switches the System Clock to the high-frequency clock and the CP3BT23 enters Active
mode again. HCC is disabled. The Bluetooth sequencer RAM and Bluetooth LLC registers are
switched back from the local 12 MHz Bluetooth clock to the System Clock. At this point, the Bluetooth
sequencer RAM and Bluetooth LLC registers are once again accessible by the CPU. If enabled, an
interrupt is issued to the CPU.
106 Bluetooth Controller
Figure 15-12. Bluetooth Sleep Mode Sequence
Submit Documentation Feedback
Product Folder Links: CP3BT23
Copyright © 2013–2014, Texas Instruments Incorporated