CP3BT23_14 Datasheet, PDF (5/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
www.ti.com
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
3.4 BUS INTERFACE UNIT
The Bus Interface Unit (BIU) controls access to internal/external memory and I/O. It determines the
configured parameters for bus access (such as the number of wait states for memory access) and issues
the appropriate bus signals for each requested access.
The BIU uses a set of control registers to determine how many wait states and hold states are used when
accessing Flash program memory and the I/O area. At start-up, the configuration registers are set for
slowest possible memory access. To achieve fastest possible program execution, appropriate values must
be programmed. These settings vary with the clock frequency and the type of off-chip device being
accessed.
3.5 INTERRUPT CONTROL UNIT (ICU)
The ICU receives interrupt requests from internal and external sources and generates interrupts to the
CPU. An interrupt is an event that temporarily stops the normal flow of program execution and causes a
separate interrupt handler to be executed. After the interrupt is serviced, CPU execution continues with
the next instruction in the program following the point of interruption.
Interrupts from the timers, UARTs, Microwire/SPI interface, and Multi-Input Wake-Up, are all maskable
interrupts; they can be enabled or disabled by software. There are 47 maskable interrupts, assigned to 47
linear priority levels.
The highest-priority interrupt is the Non-Maskable Interrupt (NMI), which is generated by a signal received
on the NMI input pin.
3.6 MULTI-INPUT WAKE-UP
The two Multi-Input Wake-Up (MIWU) modules can be used for two purposes: to provide inputs for waking
up (exiting) from the Halt, Idle, or Power Save mode, and to provide general-purpose edge-triggered
maskable interrupts to the level-sensitive interrupt control unit (ICU) inputs. Each 16channel module
generates four programmable interrupts to the ICU, for a total of 8 ICU inputs generated from 32 MIWU
inputs. Channels can be individually enabled or disabled, and programmed to respond to positive or
negative edges.
3.7 BLUETOOTH LLC
The integrated hardware Bluetooth Lower Link Controller (LLC) complies to the Bluetooth Specification
Version 1.1 and integrates the following functions:
• 4.5K-byte dedicated Bluetooth Data RAM
• 1K-byte dedicated Bluetooth Sequencer RAM
• Support of all Bluetooth 1.1 packet types
• Support for fast frequency hopping of 1600 hops/s
• Access code correlation and slot timing recovery circuit
• Power Management Control Logic
• BlueRF-compatible interface (mode 2/3) to connect with TI's LMX5252 and other RF transceiver chips
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