CP3BT23_14 Datasheet, PDF (249/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
www.ti.com
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
25.2.2 Mode 2: Dual Input Capture
Mode 2 is the Dual Input Capture mode, which measures the elapsed time between occurrences of
external events, and which also provides a separate general-purpose timer/ counter.
Figure 25-5 is a block diagram of the Multi-Function Timer configured to operate in Mode 2. The time base
of the capture timer depends on Timer/Counter 1, which counts down using the clock selected with the
Timer/Counter 1 clock selector. The TA and TB pins function as capture inputs. A transition received on
the TA pin transfers the timer contents to the TCRA register. Similarly, a transition received on the TB pin
transfers the timer contents to the TCRB register. Each input pin can be configured to sense either rising
or falling edges.
The TA and TB inputs can be configured to preset the counter to FFFFh on reception of a valid capture
event. In this case, the current value of the counter is transferred to the corresponding capture register
and then the counter is preset to FFFFh. Using this approach allows software to determine the on-time
and off-time and period of an external signal with a minimum of CPU overhead.
The values captured in the TCRA register at different times reflect the elapsed time between transitions on
the TA pin. The same is true for the TCRB register and the TB pin. The input signal on the TA or TB pin
must have a pulse width equal to or greater than one System Clock cycle.
There are three separate interrupts associated with the capture timer, each with its own enable bit and
pending bit. The three interrupt events are reception of a transition on the TA pin, reception of a transition
on the TB pin, and underflow of the TCNT1 counter. The enable bits for these events are TAIEN, TBIEN,
and TCIEN, respectively.
In Mode 2, Timer/Counter 2 (TCNT2) can be used as a simple system timer. The clock counts down using
the clock selected with the Timer/Counter 2 clock selector. It generates an interrupt upon each underflow if
the interrupt is enabled with the TDIEN bit.
Neither Timer/Counter 1 (TCNT1) nor Timer/Counter 2 (TCNT2) can be configured to operate as an
external event counter or to operate in the pulse-accumulate mode because the TB input is used as a
capture input. Attempting to select one of these configurations will cause one or both counters to stop.
Timer 1
Clock
Capture A
TCRA_n
Preset
Timer/Counter 1
TCNT1_n
TAEN
Underflow
Preset
Capture B
TCRB_n
TBEN
TAIEN
TAPND
TCPND
TCIEN
TBPND
TBIEN
Timer
Interrupt 1
TAn
Timer
Interrupt 1
TBn
Timer
Interrupt 1
Timer 2
Clock
Timer/Counter 2
TnCNT2_n
Underflow
TDPND
TDIEN
Timer
Interrupt 2
DS452
Figure 25-5. Dual-Input Capture Mode
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