CP3BT23_14 Datasheet, PDF (117/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
www.ti.com
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
PRM
TRG
CNVT
The ADC Primed bit is a read-only bit that indicates the ADC has been primed to perform a
conversion by writing to the ADCSTART register. The bit is cleared after the conversion is
completed.
0 – ADC has not been primed.
1 – ADC has been primed.
The ADC Triggered bit is a read-only bit that indicates the ADC has been triggered. The bit is
set during any pre-conversion delay. The bit is cleared after the conversion is completed.
0 – ADC has not been triggered.
1 – ADC has been triggered.
The ADC Conversion bit is a read-only bit that indicates the ADC has been primed to
perform a conversion, a valid internal or external trigger event has occurred, any pre-
conversion delay has expired, and the ADC conversion is in progress. The bit is cleared after
the conversion is completed.
0 – ADC is not performing a conversion.
1 – ADC conversion is in progress.
16.5.3 ADC Conversion Control Register (ADCCNTRL)
The ADCCNTRL register specifies the trigger conditions for an ADC conversion.
15
Reserved
3
2
1
0
AUTO EXT POL
POL
EXT
AUTO
The ASYNC Polarity bit specifies the polarity of edges which trigger ADC conversions. 0 –
ASYNC input is sensitive to rising edges. 1 – ASYNC input is sensitive to falling edges
The External Trigger bit selects whether conversions are triggered by writing the ADCSTART
register or activity on the ASYNC input. 0 – ADC conversions triggered by writing to the
ADCSTART register. 1 – ADC conversions triggered by qualified edges on ASYNC input.
The Automatic bit controls whether automatic mode is enabled, in which any qualified edge
on the ASYNC input is recognized as a trigger event. When automatic mode is disabled, the
ADC module must be “primed” before a qualified edge on the ASYNC input can trigger a
conversion. To prime the ADC module, software must write the ADCSTART register with any
value before an edge on the ASYNC input is recognized as a trigger event. After the
conversion is completed, the ASYNC input will be ignored until software again writes the
ADCSTART register. The AUTO bit is ignored when the EXT bit is 0. 0 – Automatic mode
disabled. 1 – Automatic mode enabled.
16.5.4 ADC Start Conversion Register (ADCSTART)
The ADCSTART register is a write-only register used by software to initiate an ADC conversion. Writing
any value to this register will cause the ADC to initiate a conversion or prime the ADC to initiate a
conversion, as controlled by the ADCCNTRL register.
Copyright © 2013–2014, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: CP3BT23
12-Bit Analog to Digital Converter 117