CP3BT23_14 Datasheet, PDF (26/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
www.ti.com
6 Memory
The CP3BT23 supports a uniform 16M-byte linear address space. Table 6-1 lists the types of memory and
peripherals that occupy this memory space. Unlisted address ranges are reserved and must not be read
or written. The BIU zones are regions of the address space that share the same control bits in the Bus
Interface Unit (BIU).
Start Address
00 0000h
04 0000h
0D 0000h
0D 2000h
0E 0000h
0E 8000h
0E 9200h
0E E800h
0E EC00h
0E F000h
0E F140h
0E F180h
0E F200h
0E F320h
10 0000h
40 0000h
80 0000h
FF 0000h
FF F200h
FF F600h
FF FB00h
FF FC00h
Table 6-1. CP3BT23 Memory Map
End Address
03 FFFFh
0C FFFFh
0D 1FFFh
0D FFFFh
0E 7FFFh
0E 91FFh
0E E7FFh
0E EBFFh
0E EFFFh
0E F13Fh
0E F17Fh
0E F1FFh
0E F33Fh
0F FFFFh
3F FFFFh
7F FFFFh
FE FFFFh
FF F1FFh
FF F5FFh
FF FAFFh
FF FBFFh
FF FFFFh
Size in Bytes
256K
576K
8K
56K
32K
4.5K
21.5K
1K
1K
320
64
128
320
67K
3072K
4096K
8128K
61952
1K
1280
256
1K
Description
On-chip Flash Program Memory,
including Boot Memory
Reserved
On-chip Flash Data Memory
Reserved
System RAM
Bluetooth Data RAM
Reserved
Bluetooth Lower Link Controller
Sequencer RAM
Reserved
CAN0 Buffers and Registers
Reserved
Bluetooth Lower Link Controller
Registers
CAN1 Buffers and Registers
Reserved
Reserved
External Memory Zone 1
External Memory Zone 2
Reserved
Peripherals and Other I/O Ports
BIU, DMA, Flash interfaces
I/O Expansion
Peripherals and Other I/O Ports
BIU Zone
Static Zone 0 (mapped
internally in IRE and ERE
mode; mapped to the
external bus in DEV mode)
N/A
Static Zone 1
Static Zone 2
N/A
IN/A
I/O Zone
N/A
6.1 OPERATING ENVIRONMENT
The operating environment controls whether external memory is supported and whether the reset vector
jumps to a code space intended to support In-System Programming (ISP). Up to 12M of external memory
space is available.
The operating mode of the device is controlled by the states on the ENV[2:0] pins at reset and the states
of the EMPTY bits in the Protection Word, as shown in Table 6-2. Internal pullups on the ENV[2:0] pins
select IRE mode or ISP mode if these pins are allowed to float.
When ENV[2:0] = 111b, IRE mode is selected unless the EMPTY bits in the Protection word indicate that
the program flash memory is empty (unprogrammed), in which case ISP mode is selected. When
ENV[2:0] = 011b, ERE mode is selected unless the EMPTY bits indicate that the program flash memory is
empty, in which case ISP mode is selected. When ENV[2:0] = 110b, ISP mode is selected without regard
to the states of the EMPTY bits. See Section 8.4.2 for more details.
In the DEV environment, the on-chip flash memory is disabled, and the corresponding region of the
address space is mapped to external memory. DEVINT mode is equivalent to DEV mode but maps static
memory zone 0 to the on-chip memory.
26
Memory
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