CP3BT23_14 Datasheet, PDF (22/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
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5.6.2 Program Stack
The program stack is normally used by software to save and restore register values on subroutine entry
and exit, hold local and temporary variables, and hold parameters passed between the calling routine and
the subroutine. The only hardware mechanisms which operate on the program stack are the PUSH, POP,
and POPRET instructions.
5.6.3 User and Supervisor Stack Pointers
To support multitasking operating systems, support is provided for two program stack pointers: a user
stack pointer and a supervisor stack pointer. When the PSR.U bit is clear, the SP register is used for all
program stack operations. This is the default mode when the user/supervisor protection mechanism is not
used, and it is the supervisor mode when protection is used.
When the PSR.U bit is set, the processor is in user mode, and the USP register is used as the program
stack pointer. User mode can only be entered using the JUSR instruction, which performs a jump and sets
the PSR.U bit. User mode is exited when an exception is taken and re-entered when the exception
handler returns. In user mode, the LPRD instruction cannot be used to change the state of processor
registers (such as the PSR).
5.7 INSTRUCTION SET
Table 5-1 lists the operand specifiers for the instruction set, and Table 5-1 is a summary of all instructions.
For each instruction, the table shows the mnemonic and a brief description of the operation performed.
In the mnemonic column, the lower-case letter “i” is used to indicate the type of integer that the instruction
operates on, either “B” for byte or “W” for word. For example, the notation ADDi for the “add” instruction
means that there are two forms of this instruction, ADDB and ADDW, which operate on bytes and words,
respectively.
Similarly, the lower-case string “cond” is used to indicate the type of condition tested by the instruction.
For example, the notation Jcond represents a class of conditional jump instructions: JEQ for Jump on
Equal, JNE for Jump on Not Equal, etc. For detailed information on all instructions, see the CompactRISC
CR16C Programmer's Reference Manual.
Operand Specifier
abs
disp
imm
Iposition
Rbase
Rdest
Rindex
RPbase, RPbasex
RPdest
RPlink
Rposition
Rproc
Rprocd
RPsrc
RPtarget
Rsrc, Rsrc1, Rsrc2
Table 5-1. Key to Operand Specifiers
Description
Absolute address
Displacement (numeric suffix indicates number of bits)
Immediate operand (numeric suffix indicates number of bits)
Bit position in memory
Base register (relative mode)
Destination register
Index register
Base register pair (relative mode)
Destination register pair
Link register pair
Bit position in register
16-bit processor register
32-bit processor register
Source register pair
Target register pair
Source register
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CPU Architecture
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