CP3BT23_14 Datasheet, PDF (32/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
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6.5 WAIT AND HOLD STATES
The number of wait cycles and hold cycles inserted into a bus cycle depends on whether it is a read or
write operation, the type of memory or I/O being accessed, and the control register settings.
6.5.1 Flash Program/Data Memory
When the CPU accesses the Flash program and data memory (address ranges 000000h–03FFFFh and
0E0000h– 0E1FFFh), the number of added wait and hold cycles depends on the type of access and the
BIU register settings.
In fast-read mode (SZCFG0.FRE=1), a read operation is a single cycle access. This limits the maximum
CPU operating frequency to 24 MHz.
For a read operation in normal-read mode (SZCFG0.FRE=0), the number of inserted wait cycles is
specified in the SZCFG0.WAIT field. The total number of wait cycles is the value in the WAIT field plus 1,
so it can range from 1 to 8. The number of inserted hold cycles is specified in the SCCFG0.HOLD field,
which can range from 0 to 3.
For a write operation in fast read mode (SZCFG0.FRE=1), the number of inserted wait cycles is 1. No hold
cycles are used.
For a write operation normal read mode (SZCFG0.FRE=0), the number of wait cycles is equal to the value
written to the SZCFG0.WAIT field plus 1 (in the late write mode) or 2 (in the early write mode). The
number of inserted hold cycles is equal to the value written to the SCCFG0.HOLD field, which can range
from 0 to 3.
6.5.2 RAM Memory
Read and write accesses to on-chip RAM is performed within a single cycle, without regard to the BIU
settings. The RAM address is in the range of 0E 0000h–0E 7FFFh and 0E 8000h–0E 91FFh.
6.5.3 Access to Peripherals
When the CPU accesses on-chip peripherals in the range of 0E F000h–0E F1FFh and FF 0000h–FF
FBFFh, one wait cycle and one preliminary idle cycle is used. No hold cycles are used. The IOCFG
register determines the access timing for the address range FF FB00h–FF FBFFh.
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Memory
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