CP3BT23_14 Datasheet, PDF (94/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
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14.1.5 Port Weak Pull-Up Register (PxWPU)
The weak pull-up register (PxWPU) determines whether the port pins have a weak pull-up on the output
buffer. The pullup device, if enabled by the register bit, operates in the general-purpose I/O mode
whenever the port output buffer is disabled. In the alternate function mode, the pull-ups are always
disabled.
A reset operation clears the port weak pull-up registers, which disables all pull-ups.
7
0
PxWPU
PxWPU
The PxWPU bits control whether the weak pull-up is enabled.
0 – Weak pull-up disabled.
1 – Weak pull-up enabled.
14.1.6 Port High Drive Strength Register (PxHDRV)
The PxHDRV register is a byte-wide, read/write register that controls the slew rate of the corresponding
pins. The high drive strength function is enabled when the corresponding bits of the PxHDRV register are
set. In both GPIO and alternate function modes, the drive strength function is enabled by the PxHDRV
registers. At reset, the PxHDRV registers are cleared, making the ports low speed.
7
0
PxHDRV
PxHDRV
The PxHDRV bits control whether output pins are driven with slow or fast slew rate.
0 – Slow slew rate.
1 – Fast slew rate.
94
Input/Output Ports
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