CP3BT23_14 Datasheet, PDF (39/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
www.ti.com
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
2. Prevent accesses to the flash memory while erasing is in progress.
3. Set the Page Erase (PER) bit in the FMCTRL or FSMCTRL register.
4. Write to an address within the desired page.
5. Wait until the FMBUSY bit becomes clear again.
6. Check the Erase Error (EERR) bit in the FMSTAT or FSMSTAT register to confirm successful erase of
the page.
7. Repeat steps 4 through 6 to erase additional pages.
8. Clear the PER bit.
8.3.4 Main Block Module Erase
A module erase operation can be used to erase an entire main block. All sections within the block must be
enabled for writing. If a boot area is defined in the block, it cannot be erased. The following steps are
performed to erase a main block:
1. Verify that the Flash Memory Busy (FMBUSY) bit in the FMSTAT or FSMSTAT register is clear.
2. Prevent accesses to the flash memory while erasing is in progress.
3. Set the Module Erase (MER) bit in the FMCTRL or FSMCTRL register.
4. Write to any address within the desired main block.
5. Wait until the FMBUSY bit becomes clear again.
6. Check the Erase Error (EERR) bit in the FMSTAT or FSMSTAT register to confirm successful erase of
the block.
7. Clear the MER bit.
8.3.5 Information Block Module Erase
Erasing an information block also erases the corresponding main block. If a boot area is defined in the
main block, neither block can be erased. Page Erase is not supported for information blocks. The following
steps are performed to erase an information block:
1. Verify that the Flash Memory Busy (FMBUSY) bit in the FMSTAT or FSMSTAT register is clear.
2. Prevent accesses to the flash memory while erasing is in progress.
3. Set the Module Erase (MER) bit in the FMCTRL or FSMCTRL register.
4. Load the FMIBAR or FSMIBAR register with any address within the block, then write any data to the
FMIBDR or FSMIBDR register.
5. Wait until the FMBUSY bit becomes clear again.
6. Check the Erase Error (EERR) bit in the FMSTAT or FSMSTAT register to confirm successful erase of
the block.
7. Clear the MER bit.
8.3.6 Main Block Write
Writing is only allowed when global write protection is disabled. Writing by the CPU is only allowed when
the write enable bit is set for the sector which contains the word to be written. The CPU cannot write the
Boot Area. Only wordwide write access to word-aligned addresses is supported. The following steps are
performed to write a word:
1. Verify that the Flash Memory Busy (FMBUSY) bit in the FMSTAT or FSMSTAT register is clear.
2. Prevent accesses to the flash memory while the write is in progress.
3. Set the Program Enable (PE) bit in the FMCTRL or FSMCTRL register.
4. Write a word to the desired word-aligned address. This starts a new pipelined programming sequence.
The FMBUSY bit becomes set while the write operation is in progress. The FMFULL bit in the FMSTAT
or FSMSTAT register becomes set if a previous write operation is still in progress.
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