CP3BT23_14 Datasheet, PDF (252/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
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25.3 TIMER INTERRUPTS
The Multi-Function Timer unit has four interrupt sources, designated A, B, C, and D. Interrupt sources A,
B, and C are mapped into a single system interrupt called Timer Interrupt 1, while interrupt source D is
mapped into a system interrupt called Timer Interrupt 2. Each of the four interrupt sources has its own
enable bit and pending bit. The enable bits are named TAIEN, TBIEN, TCIEN, and TDIEN. The pending
bits are named TAPND, TBPND, TCPND, and TDPND.
Timer Interrupts 1 and 2 are system interrupts TA and TB (IRQ14 and IRQ13), respectively.
Table 25-1 shows the events that trigger interrupts A, B, C, and D in each of the four operating modes.
Note that some interrupt sources are not used in some operating modes.
25.4 TIMER I/O FUNCTIONS
The Multi-Function Timer unit uses two I/O pins, called TA and TB. The function of each pin depends on
the timer operating mode and the TAEN and TBEN enable bits. Table 25-1 shows the functions of the pins
in each operating mode, and for each combination of enable bit settings.
When the TA pin is configured to operate as a PWM output (TAEN = 1), the state of the pin is toggled on
each underflow of the TCNT1 counter. In this case, the initial value on the pin is determined by the
TAOUT bit. For example, to start with TA high, software must set the TAOUT bit before enabling the timer
clock. This option is available only when the timer is configured to operate in Mode 1, 3, or 4 (in other
words, when TCRA is not used in Capture mode).
Table 25-1. Timer Interrupts Overview
Sys. Int.
Timer Int.
1 (TA Int.)
Timer Int.
2 (TB Int.)
Interrupt
Pending
Bit
TAPND
TBPND
TCPND
Mode 1
Mode 2
PWM + Counter
Dual Input Capture +
Counter
TCNT1 reload from TCRA
Input capture on TA
transition
TCNT1 reload from TCRB
Input Capture on TB
transition
N/A
TCNT1 underflow
TDPND
TCNT2 underflow
TCNT2 underflow
Mode 3
Dual Counter
Mode 4
Single Capture +
Counter
TCNT1 reload from TCRA TCNT1 reload from TCRA
N/A
Input Capture on TB
transition
N/A
N/A
TCNT2 reload from TCRB TCNT2 underflow
I/O
TA
TB
TAEN
TBEN
TAEN = 0
TBEN = X
TAEN = 1
TBEN = X
TAEN = X
TBEN = 0
TAEN = X
TBEN = 1
Table 25-2. Timer I/O Functions
Mode 1
PWM + Counter
No Output
Toggle Output on
Underflow of TCNT1
Ext. Event or Pulse
Accumulate Input
Ext. Event or Pulse
Accumulate Input
Mode 2
Dual Input Capture +
Counter
Capture TCNT1 into
TCRA
Capture TCNT1 into
TCRA and Preset TCNT1
Capture TCNT1 into
TCRB
Capture TCNT1 into
TCRB and Preset TCNT1
Mode 3
Dual Counter
No Output Toggle
Toggle Output on
Underflow of TCNT1
Ext. Event or Pulse
Accumulate Input
Ext. Event or Pulse
Accumulate Input
Mode 4
Single Capture +
Counter
No Output Toggle
Toggle Output on
Underflow of TCNT1
Capture TCNT2 into
TCRB
Capture TCNT2 into
TCRB and Preset TCNT2
25.5 TIMER REGISTERS
Table 25-3 lists the CPU-accessible registers used to control the Multi-Function Timers.
Name
TPRSC
Table 25-3. Multi-Function Timer Registers
Address
FF FF48h
Description
Clock Prescaler Register
252 Multi-Function Timer
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