CP3BT23_14 Datasheet, PDF (170/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
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For operation in normal mode, the Slot Count Select bits (SCS[1:0]) in the Global Configuration register
(AGCR) must be loaded with 00b (one slot per frame). In addition, the Slot Assignment bits for receive
and transmit must be programmed to select slot 0.
If the interface is configured for DMA, the DMA slot assignment bits must also be programmed to select
slot 0. In this case, the audio data is transferred to or from the receive or transmit DMA register 0
(ARDR0/ATDR0).
Figure 19-1 shows the frame timing while operating in normal mode with a long frame sync interval.
Long Frame Sync
(SFS/SRFS)
Shift Data
(STD/SRD)
Data
High-impedance
Frame
Data
DS053
Figure 19-1. Normal Mode Frame
IRQ Support If the receiver interface is configured for interrupt-driven I/O (RXDSA0 = 0), all received data
are loaded into the receive FIFO. An IRQ is asserted as soon as the number of data bytes or words in the
receive FIFO is greater than a programmable warning limit.
If the transmitter interface is configured for interrupt-driven I/O (TXDSA0 = 0), all data to be transmitted is
read from the transmit FIFO. An IRQ is asserted as soon as the number data bytes or words available in
the transmit FIFO is equal or less than a programmable warning limit.
DMA Support
If the receiver interface is configured for DMA (RXDSA0 = 1), received data is transferred from the ARSR
into the DMA receive buffer 0 (ARDR0). A DMA request is asserted when the ARDR0 register is full. If the
transmitter interface is configured for DMA (TXDSA0 = 1), data to be transmitted are read from the DMA
transmit buffer 0 (ATDR0). A DMA request is asserted to the DMA controller when the ATDR0 register is
empty.
Figure 19-2 shows the data flow for IRQ and DMA mode in normal Mode.
SRD
ARSR
DMA Slot
Assignment
TX ^{DS A = 1}
TXD SA _{= 0}
ARDR 0
DMA
Request 1
RX
IRQ
FIFO
STD
ATSR
RXDSA ^{= 1}
ATDR 0
DMA
Request 0
DMA Slot
Assignment
RXDSA _{= 0}
TX
FIFO
IRQ
DS054
Figure 19-2. IRQ/DMA Support in Normal Mode
170 Advanced Audio Interface
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