CP3BT23_14 Datasheet, PDF (109/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

CP3BT23
www.ti.com
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
16.1 FUNCTIONAL DESCRIPTION
The ADC module consists of a 12-bit ADC converter and associated state machine, together with analog
multiplexers to set up signal paths for sampling and voltage references, logic to control triggering of the
converter, and a bus interface.
16.1.1 Data Path
Up to 8 GPIO pins may be configured as 8 singled-ended analog inputs or 4 differential pairs.
Analog/digital data passes through four main blocks in the ADC module between the input pins and the
CPU bus:
• Input Multiplexer—an analog multiplexer that selects among the input channels.
• Internal/External Multiplexer—an analog multiplexer that selects between the output of the Input
Multiplexer and the ADCIN external analog input.
• 12-Bit ADC—receives the output of the Internal/External Multiplexer and performs the analog to digital
conversion.
• ADCRESLT Register—makes conversion results from the 12-Bit ADC available to the on-chip bus.
The ADCRESLT register includes the software-visible end of a 4word FIFO used to queue conversion
results.
The configuration of the analog signal paths is controlled by fields in the ADCGCR register. The Input
Multiplexer is controlled by the MUX_CFG field. The Internal/External Multiplexer is controlled by the
ADCIN bit. The analog multiplexers for selecting the voltage references used by the ADC are controlled by
the PREF_CFG and NREF_CFG fields. The low-ohmic drivers used for interface to resistive touchscreens
are controlled by the TOUCH_CFG field.
The output of the Input Multiplexer is available externally as the MUXOUT0 and MUXOUT1 signals. In
single-ended mode, only MUXOUT0 is used. In differential mode, MUXOUT0 is the positive side and
MUXOUT1 is the negative side. The MUXOUT0 and MUXOUT1 outputs and the ADCIN external analog
input are provided so that external signal conditioning circuits (such as filters) may be applied to the
analog signals before conversion. The MUXOUT0, MUXOUT1, and ADCIN signals are alternate functions
of GPIO pins used by the Input Multiplexer, so the number of available analog input channels is reduced
when these signals are used.
16.1.2 Operation
The TRIGGER block may be configured to initiate a conversion from either of these sources:
• External ASYNC Input—an edge on the ASYNC input triggers a conversion. This input may be
configured to be sensitive to rising or falling edges, as controlled by the POL bit in the ADCCNTRL
register.
• ADCSTART Register—writing any value to the ADC- START register triggers a conversion.
The TRIGGER block incorporates a glitch filter to suppress transient spikes on the ASYNC input. The
TRIGGER block will recognize ASYNC pulse widths of 10 ns or greater. Once a trigger event has been
recognized, no further triggering is recognized until the conversion is completed.
When the ASYNC input is selected as the trigger source, it may be configured for automatic or non-
automatic mode, as controlled by the AUTO bit in the ADCCNTRL register:
• Automatic Mode—a conversion is triggered by any qualified edge on the ASYNC input (unless a
conversion is already in progress).
• Non-Automatic Mode—before a conversion may be triggered from the ASYNC input, software must
“prime” the TRIGGER block by writing the ADCSTART register. Once the TRIGGER block is primed, a
conversion is triggered by any qualified edge on the ASYNC input. After the conversion is completed,
no additional trigger events will be recognized until software once again primes the TRIGGER block by
writing the ADCSTART register.
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12-Bit Analog to Digital Converter 109