English
Language : 

CP3BT23_14 Datasheet, PDF (218/324 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces
CP3BT23
SNOSCX3A – JULY 2013 – REVISED JANUARY 2014
www.ti.com
22 Microwire/SPI Interface
Microwire/Plus is a synchronous serial communications protocol, originally implemented in Texas
Instruments 's COP8® and HPC families of microcontrollers to minimize the number of connections, and
therefore the cost, of communicating with peripherals.
The CP3BT23 has an enhanced Microwire/SPI interface module (MWSPI) that can communicate with all
peripherals that conform to Microwire or Serial Peripheral Interface (SPI) specifications. This enhanced
Microwire interface is capable of operating as either a master or slave and in 8or 16-bit mode. Figure 22-1
shows a typical enhanced Microwire interface application.
The enhanced Microwire interface module includes the following features:
• Programmable operation as a Master or Slave
• Programmable shift-clock frequency (master only)
• Programmable 8or 16-bit mode of operation
• 8or 16-bit serial I/O data shift register
• Two modes of clocking data
• Serial clock can be low or high when idle
• 16-bit read buffer
• Busy bit, Read Buffer Full bit, and Overrun bit for polling and as interrupt sources
• Supports multiple masters
• Maximum bit rate of 12M bits/second (master mode) 6M bits/second (slave mode) at 24 MHz System
Clock
• Supports very low-end slaves with the Slave Ready output
• Echo back enable/disable (Slave only)
GPIO
MWCS
I/O
Lines
Master
CS
8-Bit
A/D
DO SK DI
CS
1K Bit
EEPROM
DO SK DI
CS
LCD
Display
Driver
SK DI
CS
VF
Display
Driver
SK DI
Slave
I/O
Lines
MDIDO
MDODI
MSK
MDIDO
MDODI
MSK
DS067
Figure 22-1. Microwire Interface
22.1 MICROWIRE OPERATION
The Microwire interface allows several devices to be connected on one three-wire system. At any given
time, one of these devices operates as the master while all other devices operate as slaves. The
Microwire interface allows the device to operate either as a master or slave transferring 8or 16bits of data.
The master device supplies the synchronous clock (MSK) for the serial interface and initiates the data
transfer. The slave devices respond by sending (or receiving) the requested data. Each slave device uses
the master’s clock for serially shifting data out (or in), while the master shifts the data in (or out).
The three-wire system includes: the serial data in signal (MDIDO for master mode, MDODI for slave
mode), the serial data out signal (MDODI for master mode, MDIDO for slave mode), and the serial clock
(MSK).
218 Microwire/SPI Interface
Submit Documentation Feedback
Product Folder Links: CP3BT23
Copyright © 2013–2014, Texas Instruments Incorporated