HD64F3039F18 Datasheet, PDF (96/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 3 MCU Operating Modes
3.7 Restrictions on Use of Mode 6
In mode 6 (single-chip normal mode), on-chip ROM area data is undefined if address H'10000 or
above (64 kbytes or above) is accessed, and therefore instruction code fetch and data read
operations may not always be performed normally.
However, there is no problem with address H'10000 and above if the lower 16-bit address is an
on-chip RAM (H'F710 to H'FF0F) or internal I/O register (H'FF1C to H'FFFF) address.
Table 3.4 shows the restrictions concerning each addressing mode.
Table 3.4 Access Restrictions in Mode 6 (Single-Chip Normal Mode)
Addressing Mode
Register direct (Rn)
Register indirect
(@ERn)
Register indirect with
displacement
(@(d:16,ERn),
@(d:16,ERn))
Register indirect with
post-increment
(@ERn+)
Register indirect with
pre-decrement
(@ERn-)
Absolute address
(@aa:8)
Absolute address
(@aa:16)
Conditions
Restricted Item Address Range


Contents of ERn
H'00010000 or
above, with lower
16 bits in range
H'0000 to H'F710
Value of ERn
contents plus
displacement
Operation
No problem
Read data is
undefined.
Writes are
invalid.
Restriction

Set upper 16 bits of ERn
to H'0000; or, write
same data as in
H'00000–H'0FFFF to
H'10000–H'1FFFF in
on-chip ROM.
Value of ERn
contents
incremented (or
decremented) by
1, 2, or 4


No problem 
Value of @aa
sign-extended to
24 bits
H'010000 or
above, with lower
16 bits in range
H'0000 to H'F710
Read data is
undefined.
Writes are
invalid.
Do not specify H'8000
or above as absolute
address; or, write same
data as in H'00000–
H'0FFFF to H'10000–
H'1FFFF in on-chip
ROM.
Rev.3.00 Mar. 26, 2007 Page 72 of 682
REJ09B0353-0300