HD64F3039F18 Datasheet, PDF (611/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Instruction Mnemonic
MOV
MOV.W Rs, @aa:24
MOV.L #xx:32, ERd
MOV.L ERs, ERd
MOV.L @ERs, ERd
MOV.L @(d:16, ERs), ERd
MOV.L @(d:24, ERs), ERd
MOV.L @ERs+, ERd
MOV.L @aa:16, ERd
MOV.L @aa:24, ERd
MOV.L ERs, @ERd
MOV.L ERs, @(d:16, ERd)
MOV.L ERs, @(d:24, ERd)
MOV.L ERs, @–ERd
MOV.L ERs, @aa:16
MOVFPE
MOVTPE
MOV.L ERs, @aa:24
MOVFPE @aa:16, Rd*²
MOVTPE Rs, @aa:16*²
MULXS
MULXS.B Rs, Rd
MULXS.W Rs, ERd
MULXU
MULXU.B Rs, Rd
MULXU.W Rs, ERd
NEG
NEG.B Rd
NEG.W Rd
NEG.L ERd
NOP
NOP
NOT
NOT.B Rd
NOT.W Rd
NOT.L ERd
OR
OR.B #xx:8, Rd
OR.B Rs, Rd
OR.W #xx:16, Rd
OR.W Rs, Rd
OR.L #xx:32, ERd
OR.L ERs, ERd
Appendix A Instruction Set
Instruction Branch
Stack
Byte Data Word Data Internal
Fetch
Addr. Read Operation Access Access Operation
I
J
K
L
M
N
3
1
3
1
2
2
3
2
5
2
2
2
2
3
2
4
2
2
2
3
2
5
2
2
2
2
3
2
4
2
2
1
2
1
2
12
2
20
1
12
1
20
1
1
1
1
1
1
1
1
1
2
1
3
2
Rev.3.00 Mar. 26, 2007 Page 587 of 682
REJ09B0353-0300