HD64F3039F18 Datasheet, PDF (102/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 4 Exception Handling
4.2 Reset
4.2.1 Overview
A reset is the highest-priority exception. When the RES pin goes low, all processing halts and the
H8/3039 Group enters the reset state. A reset initializes the internal state of the CPU and the
registers of the on-chip supporting modules. Reset exception handling begins when the RES pin
changes from low to high.
The chip can also be reset by overflow of the watchdog timer. For details see section 10,
Watchdog Timer.
4.2.2 Reset Sequence
The H8/3039 Group enters the reset state when the RES pin goes low.
To ensure that the chip is reset, hold the RES pin low for at least 20 ms at power-up. To reset the
chip during operation, hold the RES pin low for at least 10 system clock (φ) cycles. When using
the flash memory version, hold at "Low" level for a least 1usec. See appendix D.2, Pin States at
Reset, for the states of the pins in the reset state.
When the RES pin goes high after being held low for the necessary time, the H8/3039 Group chip
starts reset exception handling as follows.
• The internal state of the CPU and the registers of the on-chip supporting modules are
initialized, and the I bit is set to 1 in CCR.
• The contents of the reset vector address (H'0000 to H'0003 in advanced mode) are read, and
program execution starts from the address indicated in the vector address.
Figure 4.2 shows the reset sequence in modes 5 and 7.
Rev.3.00 Mar. 26, 2007 Page 78 of 682
REJ09B0353-0300