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HD64F3039F18 Datasheet, PDF (416/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series
Section 12 Smart Card Interface
12.1.2 Block Diagram
Figure 12.1 shows a block diagram of the Smart Card interface.
Module data bus
RxD0
TxD0
SCK0
RDR
RSR
TDR
SCMR
BRR
SSR
TSR
SCR
SMR
Transmission/
reception control
Baud rate
generator
Parity generation
Clock
Parity check
Legend:
SCMR: Smart Card mode register
RSR: Receive shift register
RDR: Receive data register
TSR: Transmit shift register
TDR: Transmit data register
SMR: Serial mode register
SCR: Serial control register
SSR: Serial status register
BRR: Bit rate register
φ
φ/4
φ/16
φ/64
TXI
RXI
ERI
Figure 12.1 Block Diagram of Smart Card Interface
Internal
data bus
Rev.3.00 Mar. 26, 2007 Page 392 of 682
REJ09B0353-0300