HD64F3039F18 Datasheet, PDF (260/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 8 16-Bit Integrated Timer Unit (ITU)
TCNT value
GR
Counter cleared by general
register compare match
H'0000
Time
STR bit
IMF
Figure 8.16 Periodic Counter Operation
Count timing:
• Internal clock source
Bits TPSC2 to TPSC0 in TCR select the system clock (φ) or one of three internal clock sources
obtained by prescaling the system clock (φ/2, φ/4, φ/8).
Figure 8.17 shows the timing.
φ
Internal
clock
TCNT input
TCNT
N–1
N
N+1
Figure 8.17 Count Timing for Internal Clock Sources
• External clock source
Bits TPSC2 to TPSC0 in TCR select an external clock input pin (TCLKA to TCLKD), and its
valid edge or edges are selected by bits CKEG1 and CKEG0. The rising edge, falling edge, or
both edges can be selected.
The pulse width of the external clock signal must be at least 1.5 system clocks when a single
edge is selected, and at least 2.5 system clocks when both edges are selected. Shorter pulses
will not be counted correctly.
Figure 8.18 shows the timing when both edges are detected.
Rev.3.00 Mar. 26, 2007 Page 236 of 682
REJ09B0353-0300