HD64F3039F18 Datasheet, PDF (286/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 8 16-Bit Integrated Timer Unit (ITU)
Example of Phase Counting Mode
Figure 8.44 shows an example of operations in phase counting mode. Table 8.9 lists the up-
counting and down-counting conditions for TCNT2.
In phase counting mode both the rising and falling edges of TCLKA and TCLKB are counted. The
phase difference between TCLKA and TCLKB must be at least 1.5 states, the phase overlap must
also be at least 1.5 states, and the pulse width must be at least 2.5 states. See figure 8.45.
TCNT2 value
Counting up
Counting down
TCLKB
Time
TCLKA
Figure 8.44 Operation in Phase Counting Mode (Example)
Table 8.9 Up/Down Counting Conditions
Counting Direction
Up-Counting
Down-Counting
TCLKA pin
High
Low High
Low
TCLKB pin
Low
High
Low
High
Phase
difference
Phase
difference
Pulse width
Pulse width
TCLKA
TCLKB
Overlap
Overlap
Phase difference and overlap: at least 1.5 states
Pulse width:
at least 2.5 states
Figure 8.45 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
Rev.3.00 Mar. 26, 2007 Page 262 of 682
REJ09B0353-0300