HD64F3039F18 Datasheet, PDF (483/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 15 ROM
(4) The RXD₁ and TXD₁ pins should be pulled up on the board.
(5) This LSI terminates transmit and receive operations by the on-chip SCI(channel 1) (by clearing
the RE and TE bits in serial control register (SCR)) before branching to the user program.
However, the adjusted bit rate is held in the bit rate register (BRR). At this time, the TXD₁ pin
is in the high level output state (P9DDR P9₁DDR=1, P9DR P9₁DR=1).
Before branching to the user program the value of the general registers in the CPU are also
undefined. Therefore, the general registers must be initialized immediately after control
branches to the user program. Since the stack pointer (SP) is implicitly used during subroutine
call, etc., a stack area must be specified for use by the user program.
There are no other internal I/O registers in which the initial value is changed.
(6) Transition to the boot mode executes a reset-start of this LSI after setting the MD₀ to MD₂ and
FWE pins according to the mode setting conditions shown in table 15.6.
At this time, this LSI latches the status of the mode pin inside the microcomputer to maintain
the boot mode status at the reset clear (startup with Low → High) timing*¹.
To clear boot mode, it is necessary to drive the FWE pin low during the reset, and then execute
reset release*¹. The following points must be noted:
(a) Before making a transition from the boot mode to the regular mode, the microcomputer
boot mode must be reset by reset input via the RES pin. At this time, the RES pin must be
hold at low level for at least 20 system clock.*³
(b) Do not change the input levels at the mode pins (MD₂ to MD₀) or the FWE pin while in
boot mode. When making a mode transition, first enter the reset state by inputting a low
level to the RES pin. When a watchdog timer reset was generated in the boot mode, the
microcomputer mode is not reset and the on-chip boot program is restarted regardless of
the state of the mode pin.
(c) Do not input low level to the FWE pin while the boot program is executing and when
programming/erasing flash memory.*²
(7) If the mode pin and FWE pin input levels are changed from 0 V to V_CC or from V_CC to 0V
during a reset (while a low level is being input to the RES pin), the microcomputer's operating
mode will change.
Therefore, since the state of the address dual port and bus control output signals (AS, RD, WR)
changes, use of these pins as output signals during reset must be disabled outside the
microcomputer.
Notes: 1. The mode pin and FWE pin input must satisfy the mode programming setup time (t_MDS)
relative to the reset clear timing.
2. For notes on FWE pin High/Low, see section 15.9, Notes on Flash Memory
Programming/Erasing.
Rev.3.00 Mar. 26, 2007 Page 459 of 682
REJ09B0353-0300