HD64F3039F18 Datasheet, PDF (279/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 8 16-Bit Integrated Timer Unit (ITU)
Examples of Complementary PWM Mode
Figure 8.35 shows an example of operation in complementary PWM mode. TCNT3 and TCNT4
operate as up/down-counters, counting down from compare match between TCNT3 and GRA3
and counting up from the point at which TCNT4 underflows. During each up-and-down counting
cycle, PWM waveforms are generated by compare match with general registers GRB3, GRA4,
and GRB4. Since TCNT3 is initially set to a higher value than TCNT4, compare match events
occur in the sequence TCNT3, TCNT4, TCNT4, TCNT3.
TCNT3 and
TCNT4 values
GRA3
GRB3
GRA4
GRB4
H'0000
TIOCA₃
Down-counting starts at compare
match between TCNT3 and GRA3
TCNT3
TCNT4
Up-counting starts when
TCNT4 underflows
Time
TIOCB₃
TIOCA₄
TOCXA₄
TIOCB₄
TOCXB₄
Figure 8.35 Operation in Complementary PWM Mode (Example 1)
(when OLS3 = OLS4 = 1)
Rev.3.00 Mar. 26, 2007 Page 255 of 682
REJ09B0353-0300