HD64F3039F18 Datasheet, PDF (487/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 15 ROM
Normal mode
*2
Erase setup state
E=1
E=0
Erase mode
FWE = 1
FWE = 0
*1
On-board
programming mode
SWE = 1
Software
software reprogramming
reprogramming
disable state
SWE = 0 ^{enable state}
EV
=1
EV
=
0
PSU ₌₁
PSU _{= 0}
PV
PV
=0
=
1
Erase-verify mode
*3
Program setup state
Program-verify mode
P=1
P=0
Programming mode
Notes:
: Normal mode
: On-board programming mode
1. Do not make a state transition by setting or clearing two or more bits at the same time.
2. After transition from the erase mode to the erase setup state, do not make a transition to the erase mode
without going through the software reprogramming enable state.
3. After transition from the programming mode to the program setup state, do not switch to the programming
mode without going through the software reprogramming enable state.
Figure 15.10 State Transition by Setting of Each Bit of FLMCR
15.5.1 Program Mode
Follow the procedure shown in the program/program-verify flowchart in figure 15.11 to write data
or programs to flash memory. Performing program operations according to this flowchart will
enable data or programs to be written to flash memory without subjecting the device to voltage
stress or sacrificing program data reliability. Programming should be carried out 32 bytes at a
time.
For the wait time (x, y, z, α, β, γ, ε, η) after setting or clearing each bit in the flash memory
control register (FLMCR) and the maximum programming count (N), see table 18.15.
Following the elapse of (x) µs or more after the SWE bit is set to 1 in flash memory control
register (FLMCR), 32-byte program data is stored in the program data area and reprogram data
area, and the 32-byte data in the reprogram data area written consecutively to the write addresses.
(The lower 8 bits of the first address written to must be H'00, H'20, H'40, H'60, H'80, H'A0, H'C0,
or H'E0.) 32 consecutive byte data transfers are performed. The program address and program data
are latched in the flash memory. A 32-byte data transfer must be performed even if writing fewer
than 32 bytes; in this case, H'FF data must be written to the extra addresses.
Rev.3.00 Mar. 26, 2007 Page 463 of 682
REJ09B0353-0300