HD64F3039F18 Datasheet, PDF (446/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 13 A/D Converter
Group
Selection
CH2
0
1
Channel Selection
CH1
CH0
0
0
1
1
0
1
0
0
1
1
0
1
Single Mode
AN (Initial value)
0
AN
1
AN₂
AN₃
AN
4
AN
5
AN
6
AN₇
Description
Scan Mode
AN
0
AN , AN
0
1
AN₀ to AN₂
AN₀ to AN₃
AN
4
AN , AN
4
5
AN to AN
4
6
AN₄ to AN₇
13.2.3 A/D Control Register (ADCR)
Bit
7
6
5
4
3
2
1
0
TRGE
—
—
—
—
—
—
—
Initial value
0
1
1
1
1
1
1
1
Read/Write
R/W
—
—
—
—
—
—
—
Reserved bits
Trigger enable
Enables or disables external triggering of A/D conversion
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion. ADCR is initialized to H'7F by a reset and in standby mode.
Bit 7—Trigger Enable (TRGE): Enables or disables external triggering of A/D conversion.
Bit 7
TRGE
0
1
Description
A/D conversion cannot be externally triggered
(Initial value)
A/D conversion starts at the falling edge of the external trigger signal (ADTRG)
Bits 6 to 0—Reserved: These bits cannot be modified and are always read as 1.
Rev.3.00 Mar. 26, 2007 Page 422 of 682
REJ09B0353-0300