HD64F3039F18 Datasheet, PDF (471/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 15 ROM
Bit 0—Program (P)*¹ *³: Selects program mode transition or clearing. Do not set the SWE, ESU,
PSU, EV, PV, or E bit at the same time.
Bit 0
P
0
1
Description
Program mode cleared
Transition to program mode
[Setting condition]
When FWE = 1, SWE = 1, and PSU = 1
(Initial value)
Notes: 1. Do not set two or more bits at the same time.
Do not turn off V_CC when a bit is set.
2. Do not set/clear the SWE bit simultaneously with other bits (ESU, PSU, EV, PV, E, P).
3. Set the P and E bits according to the program and erase algorithms shown in section
15.5, Programming/Erasing Flash Memory.
For the usage precautions, see section 15.9, Notes on Flash Memory
Programming/Erasing.
15.3.2 Erase Block Register (EBR)
EBR is an 8-bit register that designates the flash memory block for erasure. EBR is initialized to
H'00 by a reset, in hardware standby mode, or software standby mode, when a high level is not
input to the FWE terminal, or when the FLMCR SWE bit is 0 when a high level is applied to the
FWE terminal. When a bit is set in EBR, the corresponding block can be erased. Other blocks are
erase - protected. The blocks are erased block by block. Therefore, set only one bit in EBR; do not
set bits in EBR to erase two or more blocks at the same time.
Each bit in EBR cannot be set until the SWE bit in FLMCR is set. The flash memory block
configuration is shown in table 15.4. To erase all the blocks, erase each block sequentially.
This LSI does not support the on-board programming mode in mode 6, so bits in this register
cannot be set to 1 in mode 6.
Rev.3.00 Mar. 26, 2007 Page 447 of 682
REJ09B0353-0300