HD64F3039F18 Datasheet, PDF (119/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 5 Interrupt Controller
5.2.5 IRQ Sense Control Register (ISCR)
ISCR is an 8-bit readable/writable register that selects level sensing or falling-edge sensing of the
inputs at pins IRQ₅, IRQ₄, IRQ₁, and IRQ₀
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
—
— IRQ5SC IRQ4SC —
— IRQ1SC IRQ0SC
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W R/W R/W
Reserved bits
Reserved bits
IRQ₅ and IRQ₄ sense control
These bits select level sensing or falling-edge
sensing for IRQ₅ and IRQ₄ interrupts
IRQ₁ and IRQ₀ sense control
These bits select level sensing or falling-edge
sensing for IRQ₁ and IRQ₀ interrupts
ISCR is initialized to H'00 by a reset and in hardware standby mode.
Bits 7, 6, 3, and 2—Reserved: These bits are readable/writable and do not affect selection of
level sensing or falling-edge sensing.
Bits 5, 4, 1, and 0—IRQ₅, IRQ₄, IRQ₁,_,and IRQ₀ Sense Control (IRQ5SC, IRQ4SC, IRQ1SC,
IRQ0SC): These bits selects whether interrupts IRQ₅, IRQ₄, IRQ₁, IRQ₀ are requested by level
sensing of pins IRQ₅, IRQ₄, IRQ₁, IRQ₀ or by falling-edge sensing.
Bits 5, 4, 1, and 0
IRQ5SC, IRQ4SC,
IRQ1SC, IRQ0SC
0
1
Description
Interrupts are requested when IRQ₅, IRQ₄, IRQ₁, IRQ₀ inputs are low
(Initial value)
Interrupts are requested by falling-edge input at IRQ , IRQ , IRQ , IRQ
5
4
1
0
Rev.3.00 Mar. 26, 2007 Page 95 of 682
REJ09B0353-0300