HD64F3039F18 Datasheet, PDF (474/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 15 ROM
Bit 0—Reserved: This bit cannot be modified and is always read as 1.
Note: * Flash memory emulation by RAM is not supported for Mode 6 (single chip normal
mode), so programming is possible, but do not set 1.
When performing flash memory emulation by RAM, the RAME bit in SYSCR must be
set to 1.
Table 15.5 RAM Area Reassignment
RAM Area
H'FFF800 to H'FFFBFF
H'000000 to H'0003FF
H'000400 to H'0007FF
H'000800 to H'000BFF
H'000C00 to H'000FFF
Bit 3
RAMS
0
1
1
1
1
Bit 2
RAM2
0/1
0
0
1
1
Bit 1
RAM1
0/1
0
1
0
1
RAM
Emulation State
No emulation
Mapping RAM
H'00000
ROM block
EB0–EB3
(H'00000–H'00FFF)
H'003FF
H'00400
H'007FF
H'00800
H'00BFF
H'00C00
H'00FFF
ROM area
EB0
EB1
Mapping RAM
EB2
EB3
ROM
selection
area
RAM
selection
area
RAM area
Real RAM
H'FEF10
H'FF7FF
H'FF800 RAM overlap area
H'FFBFF ^{(H'FF800–H'FFBFF)}
H'FFC00
H'FFF0F
Figure 15.2 Example of Overlap ROM Area and RAM Area
Rev.3.00 Mar. 26, 2007 Page 450 of 682
REJ09B0353-0300