HD64F3039F18 Datasheet, PDF (526/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 16 Clock Pulse Generator
External Clock
The external clock frequency should be equal to the system clock frequency (φ). Table 16.3 and
figure 16.6 indicate the clock timing.
Table 16.3 Clock Timing
Item
External clock rise
time
External clock fall
time
External clock
input duty (a/t_cyc)
φ clock width duty
(b/t_cyc)
V=
CC
2.7 V to 5.5 V
Symbol Min Max
t_EXr
—
10
t_EXf
—
10
—
30
70
40
60
—
40
60
V=
CC
5.0 V ±10%
Min Max
—
5
Unit
ns
Test Conditions
Figure 16.6
—
5
ns
30
70
%
φ ≥ 5 MHz Figure
40
60
%
φ < 5 MHz ^16.6
40
60
%
t_cyc
a
EXTAL
V_CC × 0.5
t_EXr
t_EXf
tcyc
b
φ
Figure 16.6 External Clock Input Timing
Rev.3.00 Mar. 26, 2007 Page 502 of 682
REJ09B0353-0300
V_CC × 0.5