HD64F3039F18 Datasheet, PDF (644/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Appendix B Internal I/O Register Field
TOCR—Timer Output Control Register
Bit
7
6
5
—
—
—
Initial value
1
1
1
Read/Write
—
—
—
4
XTGD
1
R/W
H'91
3
2
—
—
1
1
—
—
ITU (all channels)
1
OLS4
1
R/W
0
OLS3
1
R/W
Output level select 3
0 TIOCB₃, TOCXA ₄, and TOCXB ₄ outputs are inverted
1 TIOCB₃, TOCXA ₄, and TOCXB ₄ outputs are not inverted
Output level select 4
0 TIOCA₃, TIOCA ₄, and TIOCB₄ outputs are inverted
1 TIOCA₃, TIOCA ₄, and TIOCB₄ outputs are not inverted
External trigger disable
0 Input capture A in channel 1 is used as an external trigger signal in
reset-synchronized PWM mode and complementary PWM mode*
1 External triggering is disabled
Note: * When an external trigger occurs, bits 5 to 0 in TOER are cleared to 0,
disabling ITU output.
TCR4—Timer Control Register 4
H'92
ITU4
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
— CCLR1 CCLR0 CKEG1 CKEG0 TPSC2 TPSC1 TPSC0
1
0
0
0
0
0
0
0
—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Note: Bit functions are the same as for ITU0.
Rev.3.00 Mar. 26, 2007 Page 620 of 682
REJ09B0353-0300