HD64F3039F18 Datasheet, PDF (610/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Appendix A Instruction Set
Instruction Mnemonic
LDC
LDC #xx:8, CCR
LDC Rs, CCR
LDC @ERs, CCR
LDC @(d:16, ERs), CCR
LDC @(d:24, ERs), CCR
LDC @ERs+, CCR
LDC @aa:16, CCR
LDC @aa:24, CCR
MOV
MOV.B #xx:8, Rd
MOV.B Rs, Rd
MOV.B @ERs, Rd
MOV.B @(d:16, ERs), Rd
MOV.B @(d:24, ERs), Rd
MOV.B @ERs+, Rd
MOV.B @aa:8, Rd
MOV.B @aa:16, Rd
MOV.B @aa:24, Rd
MOV.B Rs, @ERd
MOV.B Rs, @(d:16, ERd)
MOV.B Rs, @(d:24, ERd)
MOV.B Rs, @–ERd
MOV.B Rs, @aa:8
MOV.B Rs, @aa:16
MOV.B Rs, @aa:24
MOV.W #xx:16, Rd
MOV.W Rs, Rd
MOV.W @ERs, Rd
MOV.W @(d:16, ERs), Rd
MOV.W @(d:24, ERs), Rd
MOV.W @ERs+, Rd
MOV.W @aa:16, Rd
MOV.W @aa:24, Rd
MOV.W Rs, @ERd
MOV.W Rs, @(d:16, ERd)
MOV.W Rs, @(d:24, ERd)
MOV.W Rs, @–ERd
MOV.W Rs, @aa:16
Instruction Branch
Stack
Byte Data Word Data Internal
Fetch
Addr. Read Operation Access Access Operation
I
J
K
L
M
N
1
1
2
1
3
1
5
1
2
1
2
3
1
4
1
1
1
1
1
2
1
4
1
1
1
2
1
1
2
1
3
1
1
1
2
1
4
1
1
1
2
1
1
2
1
3
1
2
1
1
1
2
1
4
1
1
1
2
2
1
3
1
1
1
2
1
4
1
1
1
2
2
1
Rev.3.00 Mar. 26, 2007 Page 586 of 682
REJ09B0353-0300