HD64F3039F18 Datasheet, PDF (278/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 8 16-Bit Integrated Timer Unit (ITU)
Clearing Complementary PWM Mode
Figure 8.34 shows a sample procedure for clearing complementary PWM mode.
Complementary PWM mode
Clear complementary mode
1
Stop counting
2
1. Clear bit CMD1 in TFCR to 0, and set
channels 3 and 4 to normal operating
mode.
2. After setting channels 3 and 4 to normal
operating mode, wait at least one clock
count before clearing bits STR3 and
STR4 of TSTR to 0 to stop the counter
operation of TCNT3 and TCNT4.
Normal operation
Figure 8.34 Clearing Procedure for Complementary PWM Mode (Example)
Rev.3.00 Mar. 26, 2007 Page 254 of 682
REJ09B0353-0300