HD64F3039F18 Datasheet, PDF (421/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 12 Smart Card Interface
Bits 3 to 0—Operate in the same way as for the normal SCI. For details, see section 11.2.7, Serial
Status Register (SSR).
However, the setting conditions for the TEND bit are as shown below.
Bit 2
TEND
Description
0
Transmission is in progress
[Clearing condition]
(Initial value)
When 0 is written to TDRE after reading TDRE = 1
1
End of transmission
[Setting conditions]
• Upon reset and in standby mode
• When the TE bit in SCR is 0 and the ERS bit is also 0
• When TDRE = 1 and ERS = 0 (normal transmission) 2.5 etu after transmission of a
1-byte serial character
Note: etu: Elementary Time Unit (time for transfer of 1 bit)
12.3 Operation
12.3.1 Overview
The main functions of the Smart Card interface are as follows.
• One frame consists of 8-bit and plus a parity bit.
• In transmission, a guard time of at least 2 etu (Elementary Time Unit: the time for transfer of
one bit) is left between the end of the parity bit and the start of the next frame.
• If a parity error is detected during reception, a low error signal level is output for one etu
period, 10.5 etu after the start bit.
• If the error signal is sampled during transmission, the same data is transmitted automatically
after the elapse of 2 etu or longer.
• Only asynchronous communication is supported; there is no clocked synchronous
communication function.
Rev.3.00 Mar. 26, 2007 Page 397 of 682
REJ09B0353-0300