HD64F3039F18 Datasheet, PDF (268/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 8 16-Bit Integrated Timer Unit (ITU)
Example of Synchronization
Figure 8.27 shows an example of synchronization. Channels 0, 1, and 2 are synchronized, and are
set to operate in PWM mode. Channel 0 is set for counter clearing by compare match with GRB0.
Channels 1 and 2 are set for synchronous counter clearing. The timer counters in channels 0, 1,
and 2 are synchronously preset, and are synchronously cleared by compare match with GRB0. A
three-phase PWM waveform is output from pins TIOCA₀, TIOCA₁, and TIOCA₂. For further
information on PWM mode, see section 8.4.4, PWM Mode.
Value of TCNT0 to TCNT2 _{Cleared by compare match with GRB0}
GRB0
GRB1
GRA0
GRB2
GRA1
GRA2
H'0000
TIOCA₀
Time
TIOCA₁
TIOCA₂
Figure 8.27 Synchronization (Example)
Rev.3.00 Mar. 26, 2007 Page 244 of 682
REJ09B0353-0300